Circuit operation
-
A)
- Standard NAS-SYS/ROM Basic.
This selection of S1, S2 is shown in the circuit.
-
i)
- Decode 0000H monitor decode selects NAS-SYS.
-
ii)
- Decode 0800H video and workspace decode selects video and workspace.
-
iii)
- Decodes E000H, E800H, F000H and F800H are ORed together and decode ROM Basic.
-
iv)
- When S1d is in the position shown the ‘Power On Jump’ select 0000H; ie, the
four diodes effectively act as if LSWl 1-4 were closed (up).
-
B)
- S2 selected to ‘DISK’.
-
i)
- The Basic ROM is completely disabled.
-
ii)
- Any block of RAM in the area E000H to EFFFH will now function.
-
iii)
- Decodes F000H and F800H are ORed together to select any IC’s in sockets IC39 –
IC42 inclusive (CP/M ROM’s and possibly D-DOS ROM’s).
(If necessary S2 could be changed to a 3 pole type, and the third pole used
to select D-DOS in another IC block, if D-DOS is still at B000H to B7FFH.
-
iv)
- With Nascom selected on S1, D-DOS can be used to Read/Write/Format disks.
-
C)
- S1 selected to ‘CP/M’ (S2 at “DISK’).
-
i)
- The monitor ROM select is disabled, NAS-SYS will not operate.
-
ii)
- The 0000H and 0800H decodes are paralleled and select a 4K block of RAM; this
RAM can consist of 4 x 4118s in IC Sockets IS35, IC36, IC37 and IC38 ** **
can be 4K of dynamic RAM on an 8K RAM (A) board.
-
iii)
- The video and workspace RAM IC’s are selected to the F800H decode.
-
iv)
- The F800H decode is removed from IC’s 39 – 42, effectively disconnecting the
D-DOS ROM’s.
-
v)
- The F000H decode is routed to IC’s 39 – 42, so the CP/M BIOS and BOOT will be
operative.
-
vi)
- The ‘Power on Reset Jump’ is changed to F000H, due to Sid allowing the diodes
to ‘float’; ie, IC2 pins 3, 6, 10 and 13 go ‘high’, equivalent to LSW1 1 – 4
being down.
In the author’s Nascom 2
| IC35 – 38 | = | 4 x MK4118N-4 static RAM (switched as described). |
| IC39, 40 | = | CP/M 2708
ROM’s for F000H – F7FFH (switched as described). |
| IC42, 42 | = | D-DOS 2708 ROM’s (altered) F800H – FFFFH (switched as described). |
| Main RAM | = | 48K RAM (B) 1000H – CFFFH (not switched) |
| Aux. RAM | = | 8K RAM (A) D000H – EFFFH (not switched) |
| Total RAM under CP/M | = | 60K (excluding video/workspace) |
| Total RAM under Nascom/Disk | = | 56K (excluding video/workspace) |
| Total RAM under Nascom/Basic | = | 52K (excluding video/workspace) |
The system has been working in this fashion for a week or two, and has not
exhibited any serious problems. The clock is set at 4MHz with 1 ‘Wait State’. The RAM
(A) was modified when originally used on a Nascom 1 to cure slight ‘memory plague’, by
gridding the power tracks, and putting 6K8 pullups on the outputs of one row of
memories. The clock circuitry into the CPU has been modified slightly to improve clock
symmetry. ICl1 has been changed to a 7414 and a 270R pullup has been added between
pins 6 and 14 of IC11. R85 (33R) has been short circuited. Without the last clock mod
occasional ‘soft’ errors occured, particularly when using Basic.
Finally, a couple of points about the use of D-DOS not mentioned in the notes
supplied. Firstly, D-DOS uses the area just below 1000H as stack space. If a ‘READ’
command is used to transfer data off disk into RAM at the stack address, the program
will fail. The best solution here is to ‘READ’ to some other area, and then to use the
“C’ or ‘I’ commands to move the data as required. Secondly, the ‘Sector’ counter used
by D-DOS can only count up to FFH sectors, after which it overflows back to 00H. The
ammount of data to fill FFH sectors occupies 32K of RAM (128 x 256 bytes). In fact,